Very Low Frequency Datalogger Circuit Schematic Diagram
Simple Electronic Applications June 24th, 2010If you’re interested in radio emissions, you can build a very low-frequency (VLF) datalogger at your workbench. This PIC18LF4620-based design features a 16-bit datalogger, an SD card for data storage, a customizable hexagonal loop antenna, and circuit-controlled battery power.
Very Low Frequency Datalogger Circuit Schematic Diagram
The heart of the circuit is a PIC18LF4620 with a 3.3-V power supply. This prevents signal-level conversion between microcontroller and SD card. The PIC18LF4620 integrates a 10-bit ADC; but in order to not excessively restrict the recorded signal, I inserted an Analog Devices AD7680, which is a 16-bit, low-power, successive approximation ADC. The ADC can achieve the extraordinary sampling speed of 100 ksps with the SPI bus. Obviously, recording signals in the frequency range between 0 and 120 Hz does not require so much speed. For the Shannon theorem, a 256-sps sampling is more than enough. For communications purposes, I used the PIC18LF4620’s PORTB and the SHIFTIN/SHIFTOUT PICBASIC instructions. The only problem was the AD7680’s packaging: it’s distributed only in SOT-23 or MSOP-8 packages. I chose the latter because it was easy to find an MSOP-8-toeight- pin DIP adapter (www.cimarrontechnology.com).
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August 7th, 2011 at 5:04 pm
You probably want to filter out the 50 Hz signal from the electrical system or you will not see much else unless you are in the middle of the dessert
January 20th, 2012 at 2:36 pm
The info is a great help to me, thanks you so much.